Deliverable D5.6.4 - Cost Analysis of Proposed ╬╝Gateway   

Friday, May 29, 2009

Deliverable  D5.6.2  describes  the  purpose  and  activities  of  a  project  that  has  the  objective  of  creating  a  microcontroller  with  SP  and  SIMD  capabilities  with  focus  on  character  data  processing.

Author:

Paul  Marston,  J├╝rgen  Jagst   (ARM/ARM)

Version: Final
IST-5-034116-D5.6.4.pdf (718 Ko)